1. Field of the Invention
The present invention relates to a semiconductor device including a means for preventing a circuit from being damaged by application of unexpected high voltage due to electrostatic discharge or the like.
2. Description of the Related Art
One of major causes of defects in integrated circuits is damage of semiconductor elements, electrodes, or the like due to electrostatic discharge (hereinafter referred to as ESD). Thus, in order to prevent an integrated circuit from being damaged due to ESD, a protection circuit is inserted between a terminal and the integrated circuit. A protection circuit refers to a circuit for preventing overvoltage or overcurrent generated due to ESD from being supplied to an integrated circuit. Typical examples of elements used for protection circuits are resistors, diodes, capacitors, and the like.
For example, in References 1 and 2, a technique by which a diode is formed using a semiconductor layer formed over an insulating film and is used as an element of a protection circuit is disclosed. In Reference 1, a polysilicon lateral diode obtained by forming a PN junction in a polysilicon film in a lateral direction is inserted between a high-frequency input-output signal line and an external power source VDD. In Reference 2, a PIN diode formed using a semiconductor layer is used as a protection element. By providing a floating electrode so that it faces with an i-type layer of the PIN diode, when a gate insulating film is damaged by supply of overcurrent to the element of the protection circuit and is electrically penetrated, a p-type layer (or an n-type layer) of the PIN diode and the floating electrode are short-circuited.
[Reference]
Reference 1: Japanese Published Patent Application No. 2002-100761
Reference 2: Japanese Published Patent Application No. 2006-060191